ACTIVE DEVICES FOR LOW NOISE AMPLIFIERS

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Small-signal model

The simplified small-signal equivalent circuit of the SiGe HBT in the hybrid-π configuration is represented in Figure 4.8 [89]. The circuit is based on the VBIC model for vertical deep-trench isolated SiGe HBTs in the forward active region, an improvement of the SPICE Gummel-Pon model widely used for bipolar transistors. Advanced compact models, such as the SPICE Gummel-Poon model (SGP) and more recently the VBIC, Mextram and HiCuM, do not lend themselves to simple analytical analysis. Simulation results from advanced and simple models are close in typical applications where current crowding effects, substrate effects, the dependence of the forward transit time, the basecollector capacitance and the output conductance to bias conditions can be neglected

Dependence between Rsopt and the emitter length

It has been indicated that Fmin is not related to the length of the emitter when the ratio le/we is larger than ten. At constant current density, when the width of the transistor increases by a factor of N, the collector current also increases by the same factor and consequently the transconductance gm. The capacitances Cbc and Cbe also increase by the same factor N and the unity gain frequency remains constant, as shown by equation   T gm Cbe Cbc f  2  . In cases where the emitter length increases by a factor of N at constant current density, the unity gain frequency is unchanged while gm increases and rb decreases by the same factor. If the emitter parasitic resistance is small and the DC gain is high, (4.97) shows that Fmin is constant, but, Rn, Xsopt and Rsopt decreases by a factor of N, as shown by (4.100) and the expression of Ysopt in Addendum C (C.16). Generally, Rsopt is found by measurement or by simulation. A script for the simulation of Rsopt in SKILL is provided in Addendum D.

BANDWIDTH OF THE IDCE LNA

In RF design, the bandwidth of an LNA is determined by the frequency bandwidth through which the transfer of energy between the source and the LNA is optimum, rather than by the power gain or the NF. The transfer of energy depends on the impedance of the source and on the LNA input impedance; optimum power transfer is achieved when the source impedance is equal to the complex conjugate of the input impedance of the LNA. This requirement is verified at a single frequency but the input bandwidth corresponds to a frequency bandwidth set by an accepted range of signal reflection corresponding to the parameter S11.

FREQUENCY SELECTION FOR OPTIMISATION

For applications where very low NFs over a large bandwidth are required, such as in radio astronomy, LNAs are generally designed to achieve the minimum NF at the high end of the frequency range [125]. This is justified by the direct dependence of the NF on the operating frequency. In case power matching is achieved near the high-end frequency, the matching deteriorates at any other lower frequency. However, achieving power matching in the middle of the frequency band may provide optimum results through the whole bandwidth. It can be seen from Figure 4.30 that the bandwidth extension resulting from coupled resonant circuits is improved with the difference between the resonant frequencies of the tuned circuits. In the case power matching is achieved in the middle of the frequency band, simulation shows that the matching deteriorates significantly in the higher half of the frequency band..

PROPOSED DESIGN METHODOLOGY

This chapter has identified and analysed the main elements affecting the noise performance of an integrated LNA based on SiGe HBTs. The findings of the analysis allow the derivation of a design methodology for a sub-1 dB LNA that can be used for the SKA. The design of a sub-1 dB LNA based on SiGe HBTs starts with the selection of the relevant semiconductor process. The preferred semiconductor process should have high β, high fT and low base and emitter parasitic resistances. In addition, from (4.98), it is desired to use a process with a low emitter width, we. The preferred topology is the IDCE and noise matching is achieved by the sizing of a single transistor or by the paralleling of several identical transistors, depending on the operating frequency. Broadband input impedance matching is performed by LE, LB and by the addition of a capacitor CL between the collector of the input transistor and the emitter of the cascode transistor.

Bandwidth extension

It is shown in Section 4.7 that the bandwidth of the LNA can be extended by the addition of a capacitor CL between the input and the cascode transistors. Simulation shows that f2 is 89.8 MHz, for which CL is 3.867 pF, corresponding to a value of –24.5 dB for S11. The resonant frequency f1 of the second tuned circuit is 1.845 GHz, which is weakly related to CL. The value of S11 is strongly related to CL. The value of CL is determined by simulation and the value CLopt corresponding to a near-flat response of S11 in the frequency band of the amplifier is 7.196 pF. For a value of CL of 7.196 pF, S11 is less than -10 dB in a wide input bandwidth of the LNA, from 300 MHz to 1.4 GHz. For very high values of CL compared to CLopt, S11 tends to its minimum value shown in Figure 5.17, and the frequency f1 is almost invariant. The plot of S11 as a function of frequency and of CL obtained by parametric simulation of S11 is represented in Figure 5.19. The capacitance CL is swept from 0.538 pF to 30.499 pF in 10 steps.

Choice of inductors

Two types of inductors are available in the IBM BiCMOS8HP process. The inductors use a 4 μm-thick topmost metal (AM), but different ground planes. A deep trench is used as ground plane for DT inductors. For M1 inductors, the ground plane is the metal-1 layer. This ground plane shields the spiral inductor from substrate noise. Two chokes are used by the LNA to block AC small signals. Although a high Q is not generally a selection criterion for chokes, chokes with low parasitic losses are required for the LNA in order to reduce their impact on the NF. In general, selection criteria for inductors are the configuration in which the inductance is used [74], the inductance value, the self-resonant frequency and the parasitic series resistance. For a choke, inductor with a high value is desired, typically more than 1 μH. The parasitic resistance is typically between 1 Ω and 10 Ω.

DC bias

The biasing of the LNA is key for the stabilisation of the emitter density current in view of process and temperature variations. It also affects the linearity of the LNA, as the DC operation point may vary when the input signal is large. The DC bias voltage is 0.7705 V, corresponding to a collector current of 6.47 mA for the 14 input transistors, and a density current of 0.214 mA/μm2 . The 14 transistors at the input of the LNA form the second branch of a current mirror. The current input of the current mirror is equal to 6.47/14 = 0.462 mA. Because the voltage drop is 0.7705 V at the junction base-emitter of the current mirror transistors, the value of the collector resistance for the mirror is 1424 Ω, the supply voltage being 2.2 V. This value is fine-tuned to 1572 Ω by simulation. It is found subsequently that the minimal NF of 0.452 dB is achieved at 1250 Ω, at a collector bias current of 7.93 mA for the 14 parallel transistors. The bias circuit is represented in Figure 5.30, where N2 represents the 14 input transistors of the cascode. It is shown in [140], that linearity is not impaired by large input signals. It is noted that the emitter current density corresponding to Fmin is directly related to VT. Hence, a band-pass temperature stabilised current is not desired for the constant current source.

TABLE OF CONTENTS :

• CHAPTER 1 INTRODUCTION
  • 1.1 PROBLEM STATEMENT
    • 1.1.1 Context of the problem
    • 1.1.2 Research gap
  • 1.2 RESEARCH OBJECTIVE AND QUESTIONS
  • 1.3 HYPOTHESIS AND APPROACH
    • 1.3.1 Research hypothesis
    • 1.3.2 Research approach
  • 1.4 RESEARCH GOALS
  • 1.5 RESEARCH CONTRIBUTION
  • 1.6 PUBLICATIONS RESULTING FROM THIS RESEARCH
  • 1.7 OVERVIEW OF STUDY
• CHAPTER 2 LITERATURE STUDY
  • 2.1 INTRODUCTION
  • 2.2 THE SKA
    • 2.2.1 The scientific case of the SKA
    • 2.2.2 Requirements of the SKA
    • 2.2.3 The impact of sensitivity on noise figure
    • 2.2.4 LNA for the SKA
    • 2.2.5 SKA LNA developments
  • 2.3 THE LOW NOISE AMPLIFIER
    • 2.3.1 Background
    • 2.3.2 Topologies of LNAs
    • 2.3.3 Wideband LNAs
    • 2.3.4 Performance specifications
  • 2.4 PERFORMANCE METRICS OF AN LNA
  • 2.5 ACTIVE DEVICES FOR LOW NOISE AMPLIFIERS
    • 2.5.1 Advantages and applications of SiGe HBT technology
  • 2.6 NOISE SOURCES IN ELECTRONIC SYSTEMS
  • 2.7 PASSIVE COMPONENTS
    • 2.7.1 Off-chip inductors
    • 2.7.2 On-chip inductors
  • 2.8 OTHER FACTORS AFFECTING THE NF OF AN LNA
  • 2.9 NF OPTIMISATION TECHNIQUES
    • 2.9.1 Voinigescu technique
    • 2.9.2 Shaeffer and Lee’s technique
    • 2.9.3 Andreani and Nguyen’s technique
    • 2.9.4 Classical two-port noise theory
    • 2.9.5 Recent approaches
  • 2.10 CONCLUSION
• CHAPTER 3 RESEARCH METHODOLOGY
  • 3.1 INTRODUCTION
  • 3.2 ELECTRONIC NOISE IN TWO-PORT NETWORKS
  • 3.3 THE INTEGRATED CIRCUIT PROCESS
  • 3.4 NOISE MODELLING FOR SIGE HBTS AND PASSIVE COMPONENTS
  • 3.5 NOISE FOR SIGE HBT CE AND CASCODE AMPLIFIER
  • 3.6 NOISE FOR THE IDCE AMPLIFIERS
  • 3.7 INPUT IMPEDANCE MATCHING
  • 3.8 OUTPUT IMPEDANCE MATCHING
  • 3.9 LAYOUT AND FABRICATION
  • 3.10 MEASUREMENTS AND EQUIPMENT
  • 3.11 CONCLUSION
• CHAPTER 4 THEORETICAL ANALYSIS AND DESIGN METHODOLOGY
  • 4.1 INTRODUCTION
  • 4.2 NOISE FUNDAMENTALS
    • 4.2.1 Signals and noise
    • 4.2.2 Two-port noise model
    • 4.2.3 Relation between minimum noise factor and input referred noise sources
    • 4.2.4 Noise correlation matrix
    • 4.2.5 Transformation between representations
    • 4.2.6 Relation between noise parameters and the noise correlation matrix in chain representation
      • 4.2.7 Transfer of noise sources to the input in chain representation
      • 4.2.8 Transfer of noise sources to the input–Y representation
  • 4.3 NF VERSUS CE, CC AND CB CONFIGURATIONS
  • 4.4 NOISE FACTOR AS FUNCTION OF THE PARAMETERS OF THE SIGE HBT
    • 4.4.1 Small-signal model
    • 4.4.2 Noise model
    • 4.4.3 Noise figure of the CE SiGe HBT
    • 4.4.4 Relationship between Rn, Fmin, Yopt and the parameters of a SiGe HBT
    • 4.4.5 Two-port noise parameters of the CE SiGe HBT based on admittance
• CHAPTER 5 IMPLEMENTATION AND RESULTS
• CHAPTER 6 LAYOUT, PACKAGING AND PCB
• CHAPTER 7 MEASUREMENT RESULTS
• CHAPTER 8 CONCLUSION AND FUTURE WORK
• REFERENCES

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WIDEBAND LOW NOISE AMPLIFIER FOR HIGHLY SENSITIVE SQUARE KILOMETRE ARRAY RECEIVERS